Device mounted apparatus, test head, and electronic device test system

ABSTRACT

A device mounted apparatus includes a board on which a plurality of devices are mounted and a device cooling cover covering the plurality of devices, and formed inside it with a channel through which a refrigerant can flow. The device cooling cover includes a first cover covering only the measurement device among the plurality of devices, and a second cover covering only the power device among the plurality of devices. The first cover and the second cover are electrically insulated from each other.

TECHNICAL FIELD

The present invention relates to a device mounted apparatus comprising:a board on which a device is mounted; and a device cooling cover forcooling the device mounted on the board, and a test head and electronicdevice test system comprising that device mounted apparatus.

BACKGROUND ART

In the process of production of semiconductor devices, an electronicdevice test system is necessary for testing the finally produced ICchips or other electronic devices. This type test of electronic deviceis executed by inputting a test pattern to the IC chip under test,operating it and inspecting the response pattern in the state with thetest environment set a temperature environment of an ordinarytemperature, high temperature, or low temperature.

A general electronic device test system comprises: a tester storing aprogram for sending out a test pattern and inspecting a responsepattern; a test head having contact terminals for electricallyconnecting this tester and an IC chip under test; and a handlersuccessively conveying IC chips under test to the contact terminals andphysically classifying the finished tested IC chips under test inaccordance with the test results. Further, IC chips under test are setin the handler, are conveyed to the test head, and are pushed againstthe contact terminals to electrically connect them so as to execute thedesired operational test.

The test head of such an electronic device test system comprises a largenumber of pin electronics cards (device mounted apparatus) used asinterfaces for the input/output terminals of the IC chips under test.Each pin electronics card is formed by mounting a mensurative highfrequency circuit, power circuit, or other various devices on a board.As the high frequency circuit mounted on a pin electronics card, ananalog comparator circuit receiving an analog response signal outputfrom an IC chip under test and converting it to a logic signal by thedesired threshold voltage, a high precision timing judgment circuit,etc. may be mentioned. These circuits correspond to the IC chip undertest.

The various devices of a pin electronics card become high in temperaturedue to the heat they generate at the time of testing IC chips undertest. Therefore, as a pin electronics card able to cool devicesgenerating heat on their own, one covering the front and back surfacesof the board by a cover and making a refrigerant flow inside the coverto bring the refrigerant into direct contact with the heat generatingdevices has been known in the past (for example, see Patent Document 1).

However, in this pin electronics card, a single board is provided with acover at the front and back. All of the devices mounted on the sameboard are covered by the same cover. Therefore, the current generated inthe cover due to the electromagnetic waves etc. radiated from the powercircuits is propagated as noise to the high frequency circuits, a dropin the S/N ratios of the high frequency circuits etc. is caused and asecuring of high precision tests of IC chips under test becomesdifficult in some cases. Further, depending on the timing of generationof the noise source or frequency component, sometimes the test qualitywill fluctuate for the IC chips under test.

Further when conducting a test by a desired high precision while a highfrequency circuit applies and receives an analog signal or highfrequency signal to and from an IC chip under test, sometimesinterference noise is caused along with the high frequency circuitapplying and receiving a strong level or very weak level signal andother circuits are covered by the same cover. As a result, it sometimesbecomes difficult to secure high precision tests.

[Patent Document 1] WO2005/004571

DISCLOSURE OF THE INVENTION

The present invention has as its object the provision of a devicemounted apparatus able to suppress propagation of noise between devicesmounted on a board and secure a high precision test of the device undertest and a test head and electronic device test system.

To achieve the above object, according to the present invention, thereis provided a device mounted apparatus comprising: a board on which aplurality of devices are mounted; and a device cooling cover coveringthe plurality of devices and formed inside it with a channel throughwhich a refrigerant can flow, wherein the device cooling cover includes:a first cover covering part of the devices among the plurality ofdevices; and a second cover covering at least other part of the devicesamong the plurality of devices, and the first cover and the second coverare electrically insulated from each other (see claim 1).

In the present invention, the device cooling cover is divided into afirst cover and a second cover. These are electrically insulated fromeach other. Part of the devices among the plurality of devices mountedon the board are covered by the first cover, while at least other partof the devices are covered by the second cover. Due to this, forexample, by covering devices easily generating electromagnetic wavesetc. by the first cover and covering devices susceptible to noise by thesecond cover, it is possible to prevent the propagation of noise fromone device to another device and possible to secure high precisiontesting.

While not particularly limited in the above invention, preferably a partof a peripheral edge of the first cover and a part of a peripheral edgeof the second cover overlap to form an overlapping part, and aninsulator is interposed between the first cover and the second cover atthe overlapping part (see claim 2).

While not particularly limited in the above invention, preferably afastening means for fastening the first cover and the second cover tothe board, wherein at the overlapping part, only the first coveroverlapping the second cover is directly fastened by the fastening meansto the board and the second cover is fastened through the first cover tothe board (see claim 3).

Due to this, for example it is possible to reduce the number of bolts orother fastening means and make efficient use of the space on the board.

While not particularly limited in the above invention, preferably thedevice cooling cover is provided at both main surfaces of the board, andthe device mounted apparatus further comprises a communicating means formaking a refrigerant flow between the first cover and the second coverand for making a refrigerant flow between the device cooling coversprovided at both main surfaces of the board (see claim 4).

While not particularly limited in the above invention, the first coverhas: a first front surface cover provided at a front surface side of theboard; and a first back surface cover provided at a back surface side ofthe board, the second cover has: a second front surface cover providedat a front surface side of the board; and a second back surface coverprovided at a back surface side of the board, the second back surfacecover partially faces the first front surface cover and/or the firstback surface cover partially faces the second front surface cover; andthe communicating means includes: through holes formed in the board atthe part where the second back surface cover faces the first frontsurface cover; and/or, through holes formed in the board at the partwhere the first back surface cover faces the second front surface cover(see claim 5).

The first cover and the second cover are communicated through holesformed in the part where the first cover and the second cover face eachother across the board. Due to this, it is possible to simplify theconnection structure of the channel between the first cover and thesecond cover.

While not particularly limited in the above invention, preferably thecommunicating means includes: through holes formed in the board at thepart where the first back surface cover faces the first front surfacecover; and/or through holes formed in the board at the part where thesecond back surface cover faces the second front surface cover (seeclaim 6).

To achieve the above object, according to the present invention, thereis provided a device mounted apparatus comprising: a board on which aplurality of devices are mounted; and a device cooling cover coveringthe plurality of devices and formed inside it with a channel throughwhich a refrigerant can flow, wherein the device cooling cover aredivided into at least two and has a first cover and a second cover, andthe device cooling cover is attached to the board in the state where thefirst cover and the second cover are electrically insulated (see claim7).

While not particularly limited in the above invention, preferably thedevice cooling cover is provided at both main surfaces of the board, theboard is formed at its front and back with through holes for making arefrigerant flow, and the first cover and the second cover face eachother through the through holes at the front and back of the board (seeclaim 8).

To achieve the above object, according to the present invention, thereis provided a test head comprising: a contact part which is brought intoelectrically contact with a device under test and any one of the abovedevice mounted apparatus electrically connected to the contact part (seeclaim 9).

To achieve the above object, according to the present invention, thereis provided an electronic device test system comprising: the above testhead, a handler for bringing a device under test into electricallycontact with a contact part of the test head, and a tester inputting atest signal to the device under test for operation and inspecting aresponse signal (see claim 10).

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a side view showing an overall electronic device test systemaccording to an embodiment of the present invention.

FIG. 2 is a schematic front cross-sectional view showing a test headaccording to an embodiment of the present invention.

FIG. 3 is a schematic side cross-sectional view showing a test headaccording to an embodiment of the present invention.

FIG. 4A is a front side cross-sectional view showing a pin electronicscard according to an embodiment of the present invention and is across-sectional view along the line IVA-IVA of FIG. 3.

FIG. 4B is aback side cross-sectional view showing a pin electronicscard according to an embodiment of the present invention and is across-sectional view along the line IVB-IVB of FIG. 3.

FIG. 5 is a cross-sectional view showing the configuration of a pinelectronics card according to an embodiment of the present invention andis a cross-sectional view along the line V-V of FIG. 4A and FIG. 4B.

FIG. 6 is an enlarged view of a part VI of FIG. 5.

FIG. 7 is a cross-sectional view showing the flow of a refrigerant inthe front surface side of a pin electronics card according to anembodiment of the present invention.

FIG. 8 is an enlarged view of a part VIII of FIG. 7.

FIG. 9 is a cross-sectional view showing the flow of a refrigerant inthe back surface side of a pin electronics card according to anembodiment of the present invention.

FIG. 10 is an enlarged view of a part X of FIG. 9.

FIG. 11 is a cross-sectional view along the line XI-XI in FIG. 8 andFIG. 10.

FIG. 12 is a cross-sectional view along the line XII-XII in FIG. 8 andFIG. 10.

DESCRIPTION OF NOTATIONS

-   1 . . . test head-   2 . . . handler-   3 . . . tester-   4 . . . pin electronics card-   5 . . . board-   5 a to 5 j . . . through holes-   6 . . . device cooling cover-   61 . . . first cover-   62 . . . first front surface cover-   62 a . . . projecting part-   63 . . . first back surface cover-   63 a . . . projecting part-   65 . . . second cover-   66 . . . second front surface cover-   66 a . . . step part-   66 c to 66 f . . . first to fourth partition walls-   66 g . . . inlet-   67 . . . second back surface cover-   67 a . . . step part-   67 c to 67 f . . . first to fourth partition walls-   67 g . . . outlet-   7 . . . insulator-   8 . . . bolt-   TD . . . measurement device-   PD . . . power device

BEST MODE FOR CARRYING OUT THE INVENTION

Below, embodiments of the present invention will be explained based onthe drawings.

FIG. 1 is a side view showing an overall electronic device test systemaccording to an embodiment of the present invention, FIG. 2 is aschematic front cross-sectional view showing a test head according to anembodiment of the present invention, and FIG. 3 is a schematic sidecross-sectional view showing a test head according to an embodiment ofthe present invention.

As shown in FIG. 1, the test head 1 according to the embodiment of thepresent invention is arranged exchangeably in a space part 20 providedat the bottom part of the handler 2 and is electrically connectedthrough a cable 30 to the tester 3.

As shown in FIG. 2 and FIG. 3, a contact part 10 is provided at the toppart of the test head 1. An IC chip under test is tested by beingbrought into electrical contact with a socket 101 of the contact part 10through holes formed in the handler 2.

The handler 2 successively conveys pre-test IC chips to the contact part10 of the test head 1, pushes each conveyed IC chip under test against asocket 101 of the contact part 10, then classifies and stores the testedIC chip in accordance with the test result after testing the IC chipunder test by a signal from the tester body 3 through the test head 1and cable 30. The configuration is not particularly limited.

As the handler 2, for example, a known handler of a heat plate type orchamber type may be used.

Here, a “heat plate type handler” is a handler of a type comprising: aconveyor system for conveying an IC chip under test; a heat plateapplying high temperature thermal stress to the IC chip under test; andpredetermined trays such as feed trays or classification trays etc.

Further, a “chamber type handler” is a handler of a type comprising: astorage unit storing customer trays on which pre-test and post-test ICchips are carried; a loader unit transferring IC chips under test from acustomer tray to a test tray and supplying IC chips under test carriedon the test tray to a chamber unit; a chamber unit applying apredetermined thermal stress to the IC chips under test to test them;and an unloader unit taking out tested IC chips from the chamber unitand classifying and storing them on customer trays.

The contact part 10 of the test head 1, as shown in FIG. 2 and FIG. 3,comprises sockets 101, a socket board 102 on which the sockets 101 aremounted at the top surface, and a performance board 104 electricallyconnected with the socket board 102 at the bottom side of the socketboard 102 through the cable 103.

The sockets 101 are designed to enable IC chips under test to beelectrically connected. Further, by sending an IC chip under test atesting electrical signal through a socket 101 from the tester body 3and accordingly sending the response signal read from the IC chip undertest to the tester body 3, the IC chip under test is tested forperformance, functions, etc.

Inside the test head 1, a plurality of pin electronics cards 4 (devicemounted apparatus) are provided. The performance board 104 iselectrically connected to the pin electronics cards 4.

In the present embodiment, as shown in FIG. 2 and FIG. 3, a pin holdingpart 12 which holds a plurality of spring probe pins 11 is provide atthe top end of each pin electronics card 4. By contact of the springprobe pins 11 with the pads provided at the bottom surface of theperformance board 104, the pin electronics card 4 and performance board104 are electrically connected. Note that in the present invention, themethod of connection of the pin electronics card 4 and the performanceboard 104 is not particularly limited, but for example any connectionmethod through a cable or a connector etc. may be adopted.

On the other hand, a connector 13 is provided at the bottom end of thepin electronics card 4. This connector 13 is attached to a back board105 positioned at the floor part of the test head 1. The pin electronicscard 4 is electrically connected through the connector 13, the backboard 105, and the cable 30 to the tester 3. In this way, the contactpart 10 of the test head 1 is electrically connected to the tester 3with the interposition of the pin electronics card 4.

Note that in the present invention, the structure of the test head 1 isnot limited to the example shown in FIG. 2 and FIG. 3. It may besuitably changed in a range enabling input of a test signal to an ICchip under test in electrical contact with the socket 101. For example,in the present embodiment, the pin electronics card 4 is providedvertically with respect to the back board 105, but it may also beprovided horizontally with respect to the back board 105. Further, inthe present embodiment, 2×5 pin electronics cards 4 are housed in thetest head 1 for 2×5 sockets. The number of the pin electronics cards 4is not particularly limited, but may be suitably determined inaccordance with the number of sockets 101 etc.

FIG. 4A and FIG. 4B are cross-sectional views of a pin electronics cardaccording to an embodiment of the present invention, FIG. 5 is across-sectional view along the line V-V of FIG. 4A and FIG. 4B, FIG. 6is an enlarged view of a part VI of FIG. 5, FIG. 7 is a cross-sectionalview showing the flow of a refrigerant in the front surface side of apin electronics card according to an embodiment of the presentinvention, FIG. 8 is an enlarged view of a part VIII of FIG. 7, FIG. 9is across-sectional view showing the flow of a refrigerant in the backsurface side of a pin electronics card according to an embodiment of thepresent invention, FIG. 10 is an enlarged view of a part X of FIG. 9,FIG. 11 is a cross-sectional view along the line XI-XI in FIG. 8 andFIG. 10, and FIG. 12 is a cross-sectional view along the line XII-XII inFIG. 8 and FIG. 10.

The pin electronics card 4, as shown in FIG. 4A, FIG. 4B, and FIG. 5,comprises: a board 5 on which a plurality of devices TD and PD aremounted; and a device cooling cover 6 covering the devices TD and PD andformed inside it with a channel through which the refrigerant can flow.Note that FIG. 4A shows the front surface side of the pin electronicscard 4, while FIG. 4B shows the back surface side of the pin electronicscard 4.

Among the devices mounted on the front surface of the board 5, the fourdevices positioned at the upper part in FIG. 4A are measurement devicesTD used for handling a test signal when testing the electricalcharacteristics of IC chips under test. For example, these measurementdevices TD comprises high frequency circuits in which measurement LSIsetc. are assembled.

As opposed to this, among the devices mounted on the front surface ofthe board 5, as shown in the figure, the plurality of devices mounted atthe lower part from the measurement devices TD on the front surface ofthe board 5 are power devices PD used for supplying test power to the ICchip under test at the time of the test. For example, these powerdevices PD comprises power circuits in which switching regulators areassembled.

At the back surface of the board 5 as well, similarly, as shown in FIG.4B, four measurement devices TD are mounted at the upper part of theboard 5 and a plurality of power devices PD are mounted at the lowerpart than it.

The measurement devices TD and the power devices PD mounted on the frontand back surfaces of the board 5 in this way are devices which generateheat along with being driven when testing an IC chip under test, so haveto be cooled.

The device cooling cover 6, as shown in FIG. 4A, FIG. 4B, and FIG. 5,covers the devices TD and PD mounted on the board 5. O-rings 62 b, 63 b,66 b, and 67 b are provided at the connecting parts of the devicecooling cover 6 and the board 5 (see FIG. 6). By the device coolingcover 6 closely contacting the board 5, a channel through which arefrigerant can flow is formed. Further, by a refrigerant fed from achiller (not shown) through a conduit 91 and an inlet 66 g flowingthrough a channel formed by the device cooling cover 6 and thisrefrigerant directly contacting the devices TD and PD, the heatgenerating devices TD and PD are cooled. After cooling the devices TDand PD, the refrigerant is returned through the outlet 67 g and aconduit 92 to the chiller. As the refrigerant circulating through theinside of this device cooling cover 6, a fluorine-based inert liquid(for example, Fluorinert® made by 3M) or other liquid superior inelectrical insulating characteristics may be mentioned.

In the present embodiment, the device cooling cover 6 is divided into afirst cover 61 provided at the upper part of the board 5 in FIG. 4A andFIG. 4B and a second cover 65 provided at the lower part of the board 5in the figures.

The first cover 61 is provided at the front and back surfaces of theboard 5 and comprises: a first front surface cover 62 provided at thefront surface side of the board 5 (see FIG. 4A); and a first backsurface cover 63 provided at the back surface side of the board 5 (seeFIG. 4B).

The first front surface cover 62, as shown in FIG. 4A and FIG. 5, coversonly the four measurement devices TD mounted on the front surface sideof the board 5 and can cool these measurement devices TD.

The first back surface cover 63 similarly, as shown in FIG. 4B and FIG.5, covers only the four measurement devices TD mounted on the backsurface side of the board 5 and can cool these measurement devices TD.

The first front surface cover 61, as shown in FIG. 6, is directlyfastened by a bolt 8 to the board 5 in the state with an O-ring 62 binterposed at the entire peripheral edge. The second back surface cover63 is similarly directly fastened by a bolt 8 to the board 5 in thestate with an O-ring 63 b interposed at the entire peripheral edge.Incidentally, in the present embodiment, by fastening the first frontsurface cover 62 and the first back surface cover 63 to the board 5 bythe same bolt 8, the space on the board 5 is effectively utilized.

As shown in FIG. 7 and FIG. 9, a second through hole 5 b passing throughthe board 5 from the front surface to the back surface is formed at thepart of the board 5 where the first back surface cover 63 faces thefirst front surface cover 62. The channel formed by the first frontsurface cover 62 and the channel formed by the first back surface cover63 are communicated through this second through hole 5 b.

The second cover 65 is also provided on the front and back surfaces ofthe board 5 and comprises: a second front surface cover 66 provided onthe front surface side of the board 5 (see FIG. 4A); and a second backsurface cover 67 provided on the back surface side of the board 5 (seeFIG. 4B).

The second front surface cover 66, as shown in FIG. 4A and FIG. 5,covers only the power devices PD mounted on the front surface side ofthe board 5 and cools the power devices PD.

The second back surface cover 67 similarly, as shown in FIG. 4B and FIG.5, covers only the power devices PD mounted on the back surface side ofthe board 5 and can cool the power devices PD.

The second front surface cover 66 basically is fastened to the board 5by a bolt 8 in the state with an O-ring 66 b (see FIG. 6) interposed atits entire peripheral edge. However, the part of the peripheral edge ofthe second front surface cover 66 adjoining the first front surfacecover 62 is fastened to the board 5 via the first front surface cover62.

That is, as shown in FIG. 6, the part of the peripheral edge of thefirst front surface cover 62 adjoining the second front surface cover 66is provided with a projecting part 62 a projecting out toward the secondfront surface cover 66 side. Further, to correspond to this projectingpart 62 a, the part of the peripheral edge of the second front surfacecover 66 adjoining the first front surface cover 62 is provided with arecessed step part 66 a. Further, by having the first front surfacecover 62 fastened by a bolt 8 to the board 5 in the state with theprojecting part 62 a of the first front surface cover 62 engaging withthe step part 66 a of the second front surface cover 66, the secondfront surface cover 66 is fastened through the first front surface cover62 to the board 5. In this way, the first front surface cover 62 and thesecond front surface cover 66 share the bolt 8, so it is possible toreduce the number of parts and possible to effectively use the space onthe board 5.

At this time, an insulator 7 is interposed between the projecting part62 a of the first front surface cover 62 and the step part 66 a of thesecond front surface cover 66, so the first front surface cover 62 andthe second front surface cover 66 are electrically insulated from eachother. As the material which composes this insulator 7, for example,polyphenylene sulfide (PPS) resin or other hard inflammable material maybe mentioned.

By electrically insulating the first front surface cover 62 and thesecond front surface cover 66 from each other in this way, it ispossible to prevent the propagation of noise from the power devices PDcovered by the second front surface cover 66 to the measurement devicesTD covered by the first front surface cover 62 and possible to secure ahigh precision test.

Note that the first cover 61 is preferably grounded to an analog groundthrough a resistor having a high resistance value of an extent enablingremoval of static electricity and the second cover 65 is preferablygrounded to a digital ground.

The second back surface cover 67 is similarly basically fastened by abolt 8 to the board 5 in the state with an O-ring 67 b (see FIG. 9)interposed at the entire peripheral edge. However, for the part of theperipheral edge of the second back surface cover 67 adjoining the firstback surface cover 63, as shown in FIG. 6, the first back surface cover63 is fastened by a bolt 8 to the board 5 in the state where theprojecting part 63 a provided at the first back surface cover 63 isengaged with the step part 67 a of the second back surface cover 66,whereby the second back surface cover 67 is fastened through the firstback surface cover 63 to the board 5. In this way, the first backsurface cover 63 and the second back surface cover 67 share the bolt 8,so it is possible to reduce the number of parts and possible toeffectively use the space on the board 5.

At this time, an insulator 7 is interposed between the projecting part63 a of the first back surface cover 63 and the step part 67 a of thesecond back surface cover 67. The first back surface cover 63 and thesecond back surface cover 67 are electrically insulated from each other.As the material which composes this insulator 7, in the same way asabove, for example, a PPS resin etc. may be mentioned.

By mutually electrically insulating the first back surface cover 63 andthe second back surface cover 67 from each other in this way,propagation of noise from the power devices PD covered by the secondback surface cover 67 to the measurement devices TD covered by the firstback surface cover 63 can be prevented and a high precision test can besecured.

As shown in FIG. 7 and FIG. 9, seven through holes 5 d to 5 j passingthrough the board 5 from the front surface to the rear surface areformed at the part of the board 5 where the second back surface cover 67faces the second front surface cover 66. Through these through holes 5 dto 5 j, the channel formed by the second front surface cover 66 and thechannel formed by the second back surface cover 67 are communicated.

Furthermore, in the present embodiment, as shown in FIG. 8, FIG. 10, andFIG. 11, the first front surface cover 62 and the second back surfacecover 67 partially face each other. Further, a third through hole 5 cpassing through the board 5 from the front surface to the back surfaceis formed at the part of the board 5 where the first front surface cover62 and the second back surface cover 67 face each other.

Similarly, as shown in FIG. 8, FIG. 10, and FIG. 12, the second frontsurface cover 66 and the first back surface cover 63 partially face eachother. Further, a first through hole 5 a passing through the board 5from the back surface to the front surface is also formed at the part ofthe board 5 where the second front surface cover 66 and the first backsurface cover 63 face each other.

As shown in FIG. 7, the second front surface cover 66 is provided withfour partition walls 66 c to 66 f defining channels. Further, as shownin the same drawing, the first to third partition walls 66 c to 66 edefine a channel from a fourth through hole 5 d to a fifth through hole5 e. Further, the second to fourth partition walls 66 d to 66 f definechannels from a sixth through hole 5 f to seventh and eighth throughholes 5 g and 5 h. Furthermore, the fourth partition wall 66 f defines achannel from an inlet 66 g to the first through holes 5 a.

Similarly, as shown in FIG. 9, the second back surface cover 67 is alsoprovided with four partition walls 67 c to 67 f defining channels.Further, as shown in the same drawing, the first and third partitionwalls 67 c and 67 e define a channel from a third through hole 5 c to afourth through hole 5 d. Further, the first to third partition walls 67c to 67 e define a channel from a fifth through hole 5 e to a sixththrough hole 5 f. Furthermore, the third and fourth partition walls 67 eand 67 f define channels from seventh and eighth through holes 5 g and 5h to an outlet 67 g. Further, the fourth partition wall 67 f defines achannel between a ninth through hole 5 i and a 10th through hole 5 j.

Therefore, in the device cooling cover 6 comprising the first cover 61and the second cover 65 explained above, as shown in FIG. 7 and FIG. 9,a channel consisting of the inlet 66 g of the first front surface cover62→the arrow mark X₁ in the first front surface cover 62→the firstthrough hole 5 a→the arrow mark X₂ in the first back surface cover63→the second through hole 5 b→the arrow mark X₃ in the first frontsurface cover 62→the third through hole 5 c→the arrow mark X₄ in thesecond back surface cover 67→the fourth through holes 5 d→the arrow markX₅ in the second front surface cover 66→the fifth through hole 5 e→thearrow mark X₆ in the second back surface cover 67→the sixth through hole5 f→the arrow mark X₇ in the second front surface cover 66→the seventhand eighth through holes 5 g, 5 h→the arrow mark X₈ in the second backsurface cover 67→the outlet 67 g of the second back surface cover 67 anda channel consisting of the inlet 66 g→the first front surface cover62→the ninth through holes 5 i→the arrow mark X₉ in the first backsurface cover 63→the 10th through hole 5 j→the first front surface cover62 are formed. Further, by circulation of a refrigerant supplied from achiller (not shown) through these channels, the heat generating devicesTD and PD mounted on the front and back surfaces of the board 5 arecooled.

When using this refrigerant to cool the devices TD and PD, since thedevice cooling cover 6 is divided in an electrically insulated manner,switching noise or other noise generated at the power devices PD can beprevented from being propagated to the measurement devices TD and a highprecision test can be secured when testing the electricalcharacteristics of an IC chip under test.

Further, even if dividing the device cooling cover 6, the channel formedby the first cover 61 and the channel formed by the second cover 65 arecommunicated through the third through hole 5 c or the first throughhole 5 a, so it is possible to simplify the connection structure of thedivided first cover 61 and second cover 65.

Note that the above explained embodiment was described to facilitateunderstanding of the present invention and was not described to limitthe present invention. Therefore, the elements disclosed in the aboveembodiment include all design changes and equivalents falling under thetechnical scope of the present invention.

In the above embodiment, the device cooling cover 6 was divided into thefirst cover 61 and the second cover 65, but the present invention is notparticularly limited to this. The device cooling cover 6 may also bedivided into three or more parts.

Further, in the above embodiment, the first cover 61 and the secondcover 65 share a bolt 8, but the present invention is not particularlylimited to this. Depending on the conditions of arrangement of thedivided first cover 61 and second cover 65, it is also possible not toform the projecting part 62 a and step part 66 a, but to attach thefirst cover 61 and second cover 65 to the board 5 by individual bolts 8.

In the above embodiment, the device mounted apparatus was explained withreference to a pin electronics card as an example, but the devicemounted apparatus of the present invention is not particularly limitedto this. So long as covering the devices mounted on the board by adevice cooling cover, the invention can also be applied to apparatusother than a pin electronics card.

Further, depending on the conditions of the circuits mounted on the pinelectronics card or the type of the IC chip under test, it is alsopossible to directly ground either the first cover 61 or second cover 65or both. Further, it is also possible to form a grounding use conductivepattern for direct grounding at the part where the cover abuts againstthe board.

The invention claimed is:
 1. A device mounted apparatus, comprising: aboard on which a plurality of devices are mounted; and a device coolingcover covering the plurality of devices and formed with a channelthrough which a refrigerant can flow, wherein the device cooling coverincludes: a first front surface cover covering part of the devices amongthe plurality of devices on a front surface of the board; and a secondfront surface cover covering at least other part of the devices amongthe plurality of devices on the front surface of the board, the firstfront surface cover and the second front surface cover are separatemembers from each other, the first front surface cover and the secondfront surface cover are made of electrical conductive material, a partof a peripheral edge of the first front surface cover and a part of aperipheral edge of the second front surface cover overlap to form anoverlapping part, an insulator is interposed between the first frontsurface cover and the second front surface cover at the overlappingpart, and the first front surface cover and the second front surfacecover are electrically insulated from each other.
 2. The device mountedapparatus as set forth in claim 1, wherein a top surface of the firstfront surface cover and a top surface of the second front surface coverare positioned generally in the same plane.
 3. A test head comprising: acontact part which is brought into electrical contact with a deviceunder test; and a device mounted apparatus as set forth in claim 1electrically connected to the contact part.
 4. An electronic device testsystem comprising: a test head as set forth in claim 3; a handler forbringing a device under test into electrical contact with a contact partof the test head; and a tester inputting a test signal to the deviceunder test for operation and inspecting a response signal.
 5. A devicemounted apparatus, comprising: a board on which a plurality of devicesare mounted; and a device cooling cover covering the plurality ofdevices and formed with a channel through which a refrigerant can flow,wherein the device cooling cover includes: a first front surface covercovering part of the devices among the plurality of devices on a frontsurface of the board; and a second front surface cover covering at leastother part of the devices among the plurality of devices on the frontsurface of the board, the first front surface cover and the second frontsurface cover are separate members from each other, a part of aperipheral edge of the first front surface cover and a part of aperipheral edge of the second front surface cover overlap to form anoverlapping part, an insulator is interposed between the first frontsurface cover and the second front surface cover at the overlappingpart, the first front surface cover and the second front surface coverare electrically insulated from each other, the device mounted apparatusfurther comprises a fastener that fastens the first front surface coverand the second front surface cover to the board, and at the overlappingpart, only the first front surface cover is directly fastened by thefastener to the board and the second front surface cover is fastenedthrough the first front surface cover to the board.
 6. A test headcomprising: a contact part which is brought into electrical contact witha device under test; and a device mounted apparatus as set forth inclaim 5 electrically connected to the contact part.
 7. An electronicdevice test system comprising: a test head as set forth in claim 6; ahandler for bringing a device under test into electrical contact with acontact part of the test head; and a tester inputting a test signal tothe device under test for operation and inspecting a response signal. 8.A device mounted apparatus, comprising: a board on which a plurality ofdevices are mounted; and a device cooling cover covering the pluralityof devices and formed with a channel through which a refrigerant canflow, wherein the device cooling cover includes: a first front surfacecover covering part of the devices among the plurality of devices on afront surface of the board; and a second front surface cover covering atleast other part of the devices among the plurality of devices on thefront surface of the board, the first front surface cover and the secondfront surface cover are separate members from each other, the firstfront surface cover and the second front surface cover are electricallyinsulated from each other, the device cooling cover further includes: afirst back surface cover provided on a back surface of the board; and asecond back surface cover provided on the back surface of the board, thefirst front surface cover faces the first back surface cover via theboard, the second front surface cover faces the second back surfacecover via the board, the second back surface cover partially faces thefirst front surface cover via the board, the first back surface coverpartially faces the second front surface cover via the board, at leastone through hole formed in the board at a part where the first backsurface cover faces the first front surface cover, at least one throughhole formed in the board at a part where the second back surface coverfaces the second front surface cover, at least one through hole formedin the board at a part where the second back surface cover faces thefirst front surface cover, and at least one through hole formed in theboard at a part where the first back surface cover faces the secondfront surface cover.
 9. A test head comprising: a contact part which isbrought into electrical contact with a device under test; and a devicemounted apparatus as set forth in claim 8 electrically connected to thecontact part.
 10. An electronic device test system comprising: a testhead as set forth in claim 9; a handler for bringing a device under testinto electrical contact with a contact part of the test head; and atester inputting a test signal to the device under test for operationand inspecting a response signal.
 11. A device mounted apparatus,comprising: a board on which a plurality of devices are mounted; and adevice cooling cover covering the plurality of devices and formed with achannel through which a refrigerant can flow, wherein the device coolingcover is divided into at least a first front surface cover and a secondfront surface cover provided on a front surface of the board, the firstfront surface cover and the second front surface cover are separatemembers from each other, the first front surface cover and the secondfront surface cover are made of electrical conductive material, a partof a peripheral edge of the first front surface cover and a part of aperipheral edge of the second front surface cover overlap to form anoverlapping part, an insulator is interposed between the first frontsurface cover and the second front surface cover at the overlappingpart, and the first front surface cover and the second front surfacecover are electrically insulated from each other.
 12. A test headcomprising: a contact part which is brought into electrical contact witha device under test; and a device mounted apparatus as set forth inclaim 11 electrically connected to the contact part.
 13. An electronicdevice test system comprising: a test head as set forth in claim 12; ahandler for bringing a device under test into electrical contact with acontact part of the test head; and a tester inputting a test signal tothe device under test for operation and inspecting a response signal.14. The device mounted apparatus as set forth in claim 11, wherein a topsurface of the first front surface cover and a top surface of the secondfront surface cover are positioned generally in the same plane.
 15. Adevice mounted apparatus, comprising: a board on which a plurality ofdevices are mounted; and a device cooling cover covering the pluralityof devices and formed with a channel through which a refrigerant canflow, wherein the device cooling cover is divided into at least a firstfront surface cover and a second front surface cover provided on a frontsurface of the board, the first front surface cover and the second frontsurface cover are separate members from each other, the first frontsurface cover and the second front surface cover are electricallyinsulated from each other, the device cooling cover further includes afirst back surface cover and a second back surface cover provided on aback surface of the board, the first front surface cover faces the firstback surface cover via the board, the second front surface cover facesthe second back surface cover via the board, the second back surfacecover partially faces the first front surface cover via the board, thefirst back surface cover partially faces the second front surface covervia the board, and the board is formed with through holes for flowing arefrigerant, wherein the second back surface cover and the first frontsurface cover face each other through at least one of the through holes,the first back surface cover and the second front surface cover faceeach other through at least one of the through holes, the first backsurface cover and the first front surface cover face each other throughat least one of the through holes, and the second back surface cover andthe second front surface cover face each other through at least one ofthe through holes.
 16. A test head comprising: a contact part which isbrought into electrical contact with a device under test; and a devicemounted apparatus as set forth in claim 15 electrically connected to thecontact part.
 17. An electronic device test system comprising: a testhead as set forth in claim 16; a handler for bringing a device undertest into electrical contact with a contact part of the test head; and atester inputting a test signal to the device under test for operationand inspecting a response signal.
 18. A device mounted apparatus,comprising: a board on which a plurality of devices are mounted; and adevice cooling cover covering the plurality of devices and formed with achannel through which a refrigerant can flow, wherein the device coolingcover is divided into at least a first front surface cover and a secondfront surface cover provided on a front surface of the board, the firstfront surface cover and the second front surface cover are separatemembers from each other, a part of a peripheral edge of the first frontsurface cover and a part of a peripheral edge of the second frontsurface cover overlap to form an overlapping part, an insulator isinterposed between the first front surface cover and the second frontsurface cover at the overlapping part, and the first front surface coverand the second front surface cover are electrically insulated from eachother, the device mounted apparatus further comprises a fastenerconfigured to fasten the first front surface cover and the second frontsurface cover to the board, and at the overlapping part, only the firstfront surface cover is directly fastened by the fastener to the boardand the second front surface cover is fastened through the first frontsurface cover to the board.
 19. A test head comprising: a contact partwhich is brought into electrical contact with a device under test; and adevice mounted apparatus as set forth in claim 18 electrically connectedto the contact part.
 20. An electronic device test system comprising: atest head as set forth in claim 19; a handler for bringing a deviceunder test into electrical contact with a contact part of the test head;and a tester inputting a test signal to the device under test foroperation and inspecting a response signal.